PCB Impedance Calculator
Single-ended microstrip & symmetric stripline characteristic impedance (Z0), plus a reverse solver that finds the trace width for your target impedance. Free, private, 100% client-side — nothing leaves your browser.
Microstrip impedance
Trace on an outer layer over one reference plane.
Z0 = 87 / √(εr + 1.41) × ln( 5.98·h / (0.8·w + t) )
Copper presets: 0.5 oz = 0.0175 mm · 1 oz = 0.035 mm · 2 oz = 0.07 mm. Any consistent unit works (mm, mil, inch).
Symmetric stripline impedance
Trace buried between two reference planes. b = total dielectric thickness between the planes (h1 + h2).
Z0 = 60 / √εr × ln( 1.9·b / (0.8·w + t) )
Reverse solver — width for target impedance
Exact closed-form inverse of the formulas above (no iteration):
microstrip: w = (5.98·h·e^(−Z/K) − t) / 0.8, K = 87/√(εr+1.41)
stripline: w = (1.9·b·e^(−Z/K) − t) / 0.8, K = 60/√εr
Worked examples
Each example shows the substitution step by step. All numbers verified against an independent reference implementation.
1. Classic 50 Ω microstrip on 1.6 mm FR4
- Inputs: h = 1.6 mm, w = 2.95 mm, t = 0.035 mm (1 oz), εr = 4.4.
- K = 87 / √(4.4 + 1.41) = 87 / 2.4104 = 36.093.
- ln( 5.98 × 1.6 / (0.8 × 2.95 + 0.035) ) = ln(9.568 / 2.395) = ln(3.9950) = 1.3851.
- Z0 = 36.093 × 1.3851 = 50.0 Ω.
2. Why a 3.0 mm trace is not exactly 50 Ω
- Same stackup but w = 3.0 mm: ln( 9.568 / (2.4 + 0.035) ) = ln(3.9293) = 1.3685.
- Z0 = 36.093 × 1.3685 = 49.4 Ω — within fab tolerance of 50 Ω.
3. Stripline on a 3.2 mm core
- Inputs: b = 3.2 mm (two 1.6 mm layers), w = 1.5 mm, t = 0.035 mm, εr = 4.4.
- K = 60 / √4.4 = 60 / 2.0976 = 28.604.
- ln( 1.9 × 3.2 / (0.8 × 1.5 + 0.035) ) = ln(6.08 / 1.235) = ln(4.9231) = 1.5940.
- Z0 = 28.604 × 1.5940 = 45.6 Ω.
- Reverse solver: for exactly 50 Ω use w = 1.28 mm.
4. 50 Ω on thin 0.2 mm FR4 (HDI-style)
- Inputs: h = 0.2 mm, t = 0.018 mm (0.5 oz), εr = 4.2, target Z = 50 Ω.
- K = 87 / √(4.2 + 1.41) = 87 / 2.3685 = 36.732.
- w = (5.98 × 0.2 × e^(−50/36.732) − 0.018) / 0.8 = (1.196 × 0.25635 − 0.018) / 0.8 = 0.361 mm.
- Check: microstrip Z0 at w = 0.361 mm → 50.0 Ω ✓.
5. Effect of 2 oz copper
- Same as example 2 but t = 0.07 mm (2 oz).
- ln( 9.568 / (2.4 + 0.07) ) = ln(3.8737) = 1.3543 → Z0 = 48.9 Ω.
- Thicker copper lowers Z0 by about 0.5 Ω here — enter your real copper weight.
Frequently asked questions
What is PCB trace impedance?
Trace impedance is the characteristic impedance (Z0) of a copper trace acting as a transmission line, determined by the trace width, copper thickness, dielectric height, and the board material's dielectric constant (εr). Controlled-impedance routing keeps Z0 at a target value (usually 50 Ω single-ended) to prevent signal reflections on high-speed signals.
What is the difference between microstrip and stripline?
Microstrip is a trace on an outer layer with dielectric on one side and air on the other, referenced to one ground plane. Stripline is a trace buried between two reference planes with dielectric on both sides. Stripline has lower crosstalk and more consistent impedance, but microstrip is easier to probe and rework.
What target impedance should I design for?
The most common targets are 50 Ω single-ended (RF, general high-speed), 75 Ω single-ended (video/coax interfaces), 90 Ω differential (USB, HDMI, Ethernet), and 100 Ω differential (LVDS, PCIe). Always confirm the target in your IC datasheet or interface specification.
What dielectric constant (εr) should I use for FR4?
Use εr = 4.2–4.5 for standard FR4 at low frequencies; 4.4 is the common default. Real FR4 varies with frequency, resin content, and supplier (often 4.0–4.2 at GHz frequencies), so for critical designs get the actual εr from your fab's stackup or use their field solver.
What do h, w, t, b mean in the impedance formulas?
In the microstrip formula, h is the dielectric height between trace and reference plane, w is the trace width, and t is the copper thickness (0.035 mm for 1 oz, 0.07 mm for 2 oz). In the stripline formula, b is the total dielectric thickness between the two reference planes (h1 + h2). All dimensions must use the same unit.
What trace width gives 50 Ω on 1.6 mm FR4?
On standard 1.6 mm FR4 (εr = 4.4) with 1 oz copper (t = 0.035 mm), a microstrip width of about 2.95 mm gives 50 Ω. A 3.0 mm trace computes to about 49.4 Ω, which is within typical fabrication tolerance.
Does copper weight (1 oz vs 2 oz) change impedance?
Yes, slightly. Thicker copper (larger t) lowers impedance for the same width: on 1.6 mm FR4 a 3.0 mm trace is about 49.4 Ω with 1 oz copper (t = 0.035 mm) but about 48.9 Ω with 2 oz copper (t = 0.07 mm). Enter your actual copper thickness for the best estimate.
For stripline, is b the total thickness or one layer?
b is the total dielectric thickness between the two reference planes (b = h1 + h2). For example, if your trace sits between two 0.8 mm prepreg layers, enter b = 1.6 mm. Using only one layer's thickness will give a wrong, too-low impedance.
Can I enter dimensions in mil instead of mm?
The formulas are unit-agnostic: any consistent unit works (mm, mil, inch). 1 mil equals 0.0254 mm exactly. If your fab stackup is specified in mil, convert with 1 mil = 0.0254 mm, or use the related length and mil converters linked below.
What is effective dielectric constant and propagation delay?
In microstrip, part of the field travels in air, so the signal sees an effective dielectric constant (εr_eff) between 1 and εr — about 3.3 on FR4. Propagation delay follows: roughly 60–61 ps/cm on FR4 microstrip. Stripline fields stay in the dielectric, so delay is higher (about 70 ps/cm on FR4). These numbers matter for length matching.
Why does my fab's impedance differ from this calculator?
Small differences are normal: soldermask over the trace, trapezoidal etch profile, actual εr of the laminate batch, and copper roughness all shift Z0 by a few percent. This calculator uses the standard IPC-2141 closed-form equations — an excellent design estimate. Your fab's field solver and final coupon measurement are authoritative for production.
Is this calculator accurate enough for production boards?
It is accurate enough for design and stackup planning — the closed-form equations typically land within a few percent of field-solver results for standard 50-ohm-class geometries (w/h roughly 0.5 to 2); very wide traces (w/h above about 2.3) can deviate up to around 10%. For production controlled-impedance boards, always specify the target impedance on your fabrication drawing and let the fab adjust widths and verify with impedance coupons.
Related tools
Stackups from fabs are often specified in mil — convert before entering dimensions here.
Free tool by NRTechStudio